The present invention relates to optical data transmission and, more particularly, to an optical data packet address decoder and corresponding address formats.
There are two kinds of digital communications networks in common use: electronic and optical. Optical data transmission has the advantage over electronic data transmission of relative immunity to interference and crosstalk and a significantly higher bandwidth. For several messages to share the same physical communications channel, the messages must be multiplexed. Several multiplexing schemes are commonly used in electronic networks, including time division multiplexing (TDM), frequency division multiplexing (FDM) and code division multiplexing (CDM). FDM is straightforward to implement in an optical network, where it is also commonly referred to as "wavelength division multiplexing" (WDM): each message is assigned its own carrier wavelength, and simple wavelength-sensitive optical components such as diffraction gratings are used to sort out the different messages. Several papers were presented at the 1998 Conference on Lasers and Electro-Optics (San Francisco Calif., May 3-8) on optical TDM and CDM implementations.
In both electronic and optical networks, all but the shortest messages are transmitted as several discrete packets, according to a variety of well-known protocols such as TCP/IP. FIG. 1 shows a typical format of a data packet 10: an address block 14, which indicates the destination of data packet 10 by having a destination address encoded therein, followed by a data block 12 wherein the portion of the message contained in data packet 10 is encoded. The convention in FIG. 1, and in other Figures below, is that data packets are transmitted from left to right, so that, for example, address block 14 reaches a destination node in a network before data block 12. Both the address and the message are encoded digitally, as sequences of regularly spaced electronic or optical pulses, with, for example, the presence of a pulse indicating a binary 1 and the absence of a pulse indicating a binary 0. The first bit of address block 14 is on the right side of address block 14, followed by the rest of the bits of address block 14, and similarly for data block 12. Both address block 14 and data block 12 have fixed and known transmission times. Typically, address block 14 and data block 12 both are formatted with a fixed number of bits, and their transmission times are the number of bits multiplied by the time interval associated with one bit; but, as will be seen below, other address block formats are possible. Typically, there is a time delay between the end of address block 14 and the beginning of data block 12.